Volume 18, No. 6, 2021

Memory And I/O Efficient Rectilinear Steiner Minimal Tree Construction Under High Performance Computing Environment

Dr. Latha N.R , Dr. Pallavi G B , Dr. Shyamala G. , Dr. G R Prasad


In modern VLSI circuit reducing the runtime as well as wirelength are considered to be the most preferred objectives. Thus, Rectilinear Steiner Minimal Tree (RSMT) construction is challenging. FLUTE (Fast Look-Up table) is the widely used method for fast and accurate RSMT construction. The FLUTE attained very good performance for smaller as well as higher degree nets, however, this system induces memory overhead. But it is important to utilize memory in an efficient manner. Therefore to overcome these persisting research problems, this work proposes a memory and I/O efficient RSMT (MIOERSMT) construction. In addition, by using high performance computing (HPC) environment like CPU and GPU further reduction in the execution time for constructing RSMT. But, GPU based model induces high deployment cost and requires efficient memory management method. Therefore, Performance and memory constraint parallel computation (PMCPC) algorithms are proposed that helps in efficient utilization of the computational capacities of these shared-memory multi-core HPC model. Investigations are performed on small to large nets using ISPD’98 benchmarks. The outcome achieved demonstrates that the suggested routing model reduces wire length, improves memory utilization, and also attains better processing time in comparison with the sequential and existing VLSI routing model.

Pages: 4006-4024

Keywords: Graphical processing unit, HPC, Multi-core environment, Parallel computing framework, RSMT, VLSI.

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